#JOB #POSTING Cadence Design Systems ( cadence/ ) has openings - TopicsExpress



          

#JOB #POSTING Cadence Design Systems ( cadence/ ) has openings in Noida,Pune and Bangalore for below mentioned positions. Pls send your resumes to viren@cadence with Job ID. These openings are in multiple departments for people with 2+ years experience. Cadence Noida Openings As on 8th March (Scroll down for Pune & Bangalore openings) R & D Engineer Job ID: 8676 Position: Multiple, Across Departments Location: Noida Education: BE/ B Tech/ ME/ M Tech / MS Experience : 2 – 12 yrs · Responsible for designing, developing, troubleshooting and debugging software programs. · Works on complex problems where analysis of situations or data requires an in-depth evaluation of various factors. · Judgment within broadly defined practices & policies in selecting methods, techniques, and evaluation criteria for results. · Candidate should have experience in C/C++ programming languages for operating systems · Thorough knowledge of software capabilities (Data Structure and Algorithm) · Hands On experience on UNIX or LINUX operating systems · Good problem solving skills Principal Support Application Engineer Job ID: 8422 Location: Noida Education: BE/ B Tech/ ME/ M Tech / MS Experience : 8+ yrs · The Principal Support AE provides direct technical customer support for Cadence products and will typically focus on applying technical expertise in multiple products within a verification space · The Principal Support Applications Engineer works directly with customers to answer technical questions and assists with complex technical problem diagnosis and resolution. · Person will work both independently and collaborate with other team members and R&D to address customer issues and to coordinate and facilitate Customer Change Requests (CCR’s). · The Principal Support AE will be an active contributor in team projects, take on various team lead roles/duties within the support team, demonstrate effective customer interaction skills, identify customer problem areas, advocate customer issues, and provide mentorship for AE1/AE2 level AE’s and new team members · Possess expertise in core technologies and products, while developing broad experience in others · Possess in-depth knowledge of EDA industry, R&D Technology, design flows within own area of technical expertise · Hands on experience on HDL Language like verilog, system verilog, VHDL · Understanding of simulation tools (NCSIM / SPECMAN / VSC / MODELSIM) & debugging capabilities using this tool. · Working knowledge in low power implementation, FE methodologies , UVM / Flow including synthesis · Working experience on Unix / Linux operating system. STA & Synthesis Design Engineer Job ID: 7954 Location: Noida Experience : 3-5 yrs · Position is for product engineering and validation for Cadence RTL Compiler. · Have to develop new features for RTL Compiler · Should have good timing knowledge and work experience of RC/DC and PT/ETS · Proficiency in HDL languages · Scripting and formal verification is desirable Product Validation Engineer Job ID:- 8683 Job Location:- NOIDA Experience Level:- 4-8 yrs · Position is for PV Engineer for Cadence’s flagship CIC Virtuoso product · Role includes validating, developing and implementing test methodologies & improving virtuoso product quality . · Experience in physical design, routing concept, backend flow of analog circuit design · Experience in Analog design, LVS & DRC. · Desirable: Layout design experience at advance node. RPP Design Engineer Job ID:- 8822 Job Location:- NOIDA Experience Level:- 5-8 yrs · The Person will be required to work as a part of the Cadence Rapid Prototyping Platform (RPP) R&D team · To create designs using verilog / VHDL to verify the features of the RPP System · Candidate will be expected be expected to also to maintain a regression suite of such test cases · To debug failures using Simulations and the Cadence Palladium Emulator . · To develop proficiency with FPGA P&R tools over a period of time · To contribute to the development of the product by analyzing proposed new features compatibility with accepted and prevalent design practices Cadence Pune Openings As on 8th March Sr Design Engineer - Verification Job ID : 8147 Location : Pune Experience level: 2-3 years Education: BE/ B Tech/ ME/ M Tech / MS · Excellent knowledge of computer architecture and design verification fundamentals · Some experience with Verilog and popular EDA simulation, SystemVerilog and testbench methodologies · Exposure to scripting languages like Perl, Unix shell or similar languages · Some experience with assembly language programming required · Excellent written and oral communication skills necessary Lead Design Engineer - Verification Job ID : 8148 Location : Pune Experience level: 5-7 years Education: BE/ B Tech/ ME/ M Tech / MS · Experience in mentoring junior engineers · Excellent knowledge of computer architecture and design verification fundamentals · Some experience with Verilog and popular EDA simulation, System Verilog assertions and testbench methodologies · Experience in developing complex test bench in SystemVerilog using OVM/UVM methodology · Exposure to scripting languages like Perl, Unix shell or similar languages · Some experience with assembly language programming required · Excellent written and oral communication skills necessary Principal Design Engineer - Verification Job ID : 8919 Location : Pune Experience level: 8-10 years Education: BE/ B Tech/ ME/ M Tech / MS · Experience in mentoring junior engineers · Excellent knowledge of computer architecture and design verification fundamentals · Some experience with Verilog and popular EDA simulation, System Verilog assertions and testbench methodologies · Experience in developing complex test bench in SystemVerilog using OVM/UVM methodology · Exposure to scripting languages like Perl, Unix shell or similar languages · Some experience with assembly language programming required · Excellent written and oral communication skills necessary Sr. Design Engineer Job ID : 8659 Location : Pune Experience level: 3 - 5 years Education: BE/ B Tech/ ME/ M Tech / MS · Proficient in C/C++ language programming · Knowledge of signal processing algorithms · Knowledge of DSP programming. including code optimization · Experience working with DSP SW, either as a developer or as an integrator. · Experience working with HSPA+, LTE, Wifi standards is desired · Knowledge of LTE Advanced standards is a plus. · Experience working on system integration of DSP SW will be a plus · Experience in API design is desired · Experience writing shell and/or Perl scripts is desired · Strong problem solving skills, flexible, adaptable and proactive · Strong communication skills, internal and external Lead Design Engineer - DSP Job ID : 8414 Location : Pune Experience level: 6-9 years Education: BE/ B Tech/ ME/ M Tech / MS · Good experience in developing and optimizing core signal processing algorithms. · Work experience in domains like Speech, Audio, Video or baseband communications processing, development of Math libraries in C and assembly-language/intrinsic programming for a DSP or DSP-like processor. · Good knowledge of processor ISA/architecture for at least 1-2 DSP and should have a strong grasp of the issues surrounding software performance tuning for the given DSP ISA/archtecture. · Experience in applying principles of good software and interface design, and should have experience with at least one revision control system. · Good technical communication skills are required. · Experience/knowledge of math libraries, audio/speech/video/Image processing, and familiarity to fixed point implementation is must. · Candidates with higher experience may also be considered. Lead R&D Application Engineer Job ID : 8156 Location : Pune Experience level: 4 –7 years Education: BE/ B Tech/ ME/ M Tech / MS · The R&D Applications Engineer is responsible for working directly with customers to provide technical support, application and training on Tensilica products · Provide guidance to customers on best practices for emulating Tensilica microprocessors on an FPGA, and the use of Tensilica’s software development & debug tools · Should be able to travel 6 to 10-weeks per year within India and to the US, Europe and Asia · In-depth understanding of computer architecture/ RISC processors/ DSPs · Experience in debugging firmware in FPGA prototyping of SoC designs for embedded system · Programming in C/C++ as well as assembly language programming · Good knowledge of software development tools and IDE’s and low level software development such as device drivers and RTOS Lead R&D Application Engineer Job ID : 7979 Location : Pune Experience level: 5 –7 years Education: BE/ B Tech/ ME/ M Tech / MS · Experience with synthesis tools such as RTL compiler, place and route tools such as Encounter Digital Implementation, formal verification tools such as Encounter Conformal EC, static timing analysis tools such as Encounter Timing System and power analysis tools such as Encounter Power System is required. Experience with equivalent EDA tools from other vendors is acceptable. · Must have worked on multiple ASIC/COT tape-outs at 65nm or lower geometries · Basic understanding of computer architecture and microprocessor design · Must have excellent written and verbal communication skills as well as good problem solving skills. · Self-motivated and capable of working independently or as part of team. · Able to travel 6 to 10-weeks per year to the US and to international locations in Europe and Asia. Lead Design Engineer Job ID : 8869 Location : Pune Experience level: 5 - 8 years Education: BE/ B Tech/ ME/ M Tech / MS · Good experience in developing and optimizing DSP applications in C and assembly language for a DSP or DSP-like processor. · Strong grasp of the issues surrounding software performance tuning. · Experience applying principles of good software and interface design (for example, abstraction and encapsulation) and should have experience with at least one revision control system. · Good technical communication skills is required. · Self-motivated and capable of working independently or as part of a team. · Experience with embedded hardware and knowledge of computer system architecture is required. Lead Design Engineer – DSP Imaging Job ID : 8921 Location : Pune Experience level: 6-9 years Education: BE/ B Tech/ ME/ M Tech / MS · The candidate should have a good experience in developing and optimizing core signal processing algorithms (for video and imaging domain) in C and assembly-language/intrinsic programming for a DSP or DSP-like processor. · The candidate should have a good knowledge of processor ISA/architecture for at least 1-2 DSP and should have a strong grasp of the issues surrounding software performance tuning for the given DSP ISA/architecture. · The candidate should have experience in applying principles of good software and interface design, and should have experience with at least one revision control system. · Good technical communication skills is required. · Candidate must be self-motivated and capable of working independently or as part of a team. · Experience/knowledge of video-image processing is required.. Principal Design Engineer – DSP Imaging Job ID : 8923 Location : Pune Experience level: 10+ years Education: BE/ B Tech/ ME/ M Tech / MS · The candidate should have a good experience in developing and optimizing core signal processing algorithms (for video and imaging domain) in C and assembly-language/intrinsic programming for a DSP or DSP-like processor. · The candidate should have a good knowledge of processor ISA/architecture for at least 1-2 DSP and should have a strong grasp of the issues surrounding software performance tuning for the given DSP ISA/architecture. · The candidate should have experience in applying principles of good software and interface design, and should have experience with at least one revision control system. · Good technical communication skills is required. · Candidate must be self-motivated and capable of working independently. Must have exp. of mentoring/ leading a small team. · Experience/knowledge of video-image processing is required.. Cadence Bangalore Openings As on 8th March Lead Application Engineers (Multiple positions) Job ID : 8685 Location : Bangalore Experience level: 4+ years Education: BE/ B Tech/ ME/ M Tech / MS · Understanding & interpreting integrated circuit process technologies in order to implement specifications for Cadence optimized Process Design Kits · Development & maintenance of PDKs includes creation of techfiles, symbols, PCells, Call Backs, CDFs, net listing & of Qualification data. · Proficient with the use of PDK automation tools is a plus · Engineer must have a solid background in circuits, electronics & physics and should be capable of learning new technical and consulting skills. · The candidate should possess the necessary engineering and/or consultancy skills, i.e. that he/she is technically excellent with mature communication skills to be able to consult effectively with clients, e.g. to communicate with Customers. Contribute to training activities Application Engineer Job ID : 8009 Location : Bangalore Experience level: 5 – 10 years Education: BE/ B Tech/ ME/ M Tech / MS · In-depth knowledge and hands-on experience in digital implementation flow including floorplanning, routing and timing. · Good knowledge of complete analog back-end flows from top level floorplanning down to complex block level layout implementation. · Proficiency in Cadence physical implementation tools specifically Virtuoso and Encounter. · Prior experience in using Cadence physical verification and extraction tools etc is a plus · As the job requires an extensive interaction with customers and internal stakeholders, it demands an excellent customer and communication skills, and strong leadership qualities. Application Engineer Job ID : 8622 Location : Bangalore Experience level: 2+ years Education: BE/ B Tech/ ME/ M Tech / MS · Responsible for designing, developing, troubleshooting and debugging software programs. Develop software tools including operating systems, compilers, routers, networks, utilities, database and internet-related tools, etc. · Determines hardware compatibility and/or influences hardware design. Programmers who are developing application for technical end users (e.g. CAD, CAM, CAE, CASE) should be matched here. · Works on problems of diverse scope where analysis of data requires evaluation of identifiable factors. Exercises judgment within generally defined practices and policies in selecting methods and techniques for obtaining solutions. Principal Solution Engineer(Multiple positions) Job ID : 8597 Location : Bangalore Experience level: 5+ years Education: BE/ B Tech/ ME/ M Tech / MS · Knowledge and hands-on experience in use of an hardware emulation system and/or a FPGA based prototyping system · Hands-on proficiency in writing SystemC models, HDL (SystemVerilog, Verilog, VHDL required) modeling, C/C++ · Hands-on proficiency in understanding and writing RTL designs using Verilog/VHDL, synthesis and optimization · Hands-on proficiency in simulating and debugging SoC designs in multiple language and mixed abstraction environments, preferably with Cadence IES platforms, including RTL and software co-verification · Knowledge and hands-on experience of use of standards such as SystemC TLM1/TLM2, UVM, Accelera SC-EMI · Knowledge of system bus protocols (e.g. AMBA, ACE, OCP etc.) as well as common system interfaces like Ethernet, PCI Express, USB, HDMI etc. Senior Account Manager Technology I Job ID : 8805 Location : Bangalore Experience level: 8+ years Education: BE/ B Tech/ ME/ M Tech / MS · Physical Design/Custom Layout/Verification · Work with worldwide account teams to define strategy and create technical compelling event to meet assigned quotas · Share account strategy with regional stakeholders · Responsible for identifying & driving product adoption, proliferation and competitive replacement campaigns · Identify demand creation programs for the accounts · Identifies services opportunities – customized opportunity as well ramp-up product trainings · Be a domain expert in Implementation and contribute to account reviews/strategy sessions · Credibly deliver roadmaps to customer and capture feedback / gather competitive information / Market Intelligence as needed · Launch Support/Early Adopters · Establish & drive relationship with key customer stakeholders Design Engineer Job ID : 8314 Location : Bangalore Experience level: 3+ years Education: BE/ B Tech/ ME/ M Tech / MS · Custom/Analog Layout Engg · Analog layout : Sound understanding of Analog Layout, understanding of process technology. · EDA : Proficiency with layout editor tool and all aspects of Physical verification. · Design knowledge : Good understanding of Design constraints and should be able to analyze the impact of layout on the circuit design. · The candidate should possess strong engineering fundamentals. Should have a good understanding of Analog Layout. Should have a expertise in Physical verification flows(LVS/DRC) and Parasitic extraction flow. Good understanding of process technology. Should have strong communication skills and ability to interact with multiple teams. · Working experience : 3- 6 years is desirable, though if the candidate is good, we will make exceptions Specialist Technical Writer Job ID : 8851 Location : Bangalore Experience level: 4+ years Education: BE/ B Tech/ ME/ M Tech / MS · Background : Elec. Engineering degree. >4 Years of Tech Writing experience in a related field · Other requirements : Excellent command over written and verbal English. Proactive in taking inputs from the engineers and getting their feedback/corrections implemented with a sense of urgency. · Write and maintain Technical Specifications documents for the Interface IP products of Cadence AMS India. Quickly take a hold of the technical content provided by the design engineers and convert them into presentable documents, including block diagrams, waveforms, charts, tables etc.
Posted on: Sat, 08 Mar 2014 09:05:02 +0000

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