Online IEW Seminar - HBM Tester Artifact Review presented by Scott Ward, Texas Instruments March 27, 2014 11:00AM EST (80 Minutes) A number of HBM tester artifacts have been discovered, characterized and published in recent years. Although several of the artifacts have been addressed with hardware improvements, many must be avoided by modification to the HBM stress plan. Due to ever shrinking device geometries, new tester artifacts are expected to be encountered. This seminar makes on-chip ESD protection designers aware of these tester artifacts to prevent unnecessary time spent on debugging failures that have a root cause inside the HBM tester architecture and not on the on-chip ESD protection network. Contact the ESD Association at 315-339-6937 or visit esda.org/documents/OnlineTrainingform.pdf to register today!
Posted on: Tue, 14 Jan 2014 19:00:01 +0000
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