Preparing for PCB Layout on proteus-7.8 blog.jannatun/archives/3893 goo.gl/5KJUKK blog.jannatun/wp-content/uploads/2014/11/proteus7.814.jpg Preparing for PCB Layout on proteus-7.8 Now that we have completed the circuit we need to give some thought to PCB Layout and the information that we are going to provide from the schematic. A netlist basically consists of a set of footprint names (packages associated with schematic... Preparing for PCB Layout on proteus-7.8 Now that we have completed the circuit we need to give some thought to PCB Layout and the information that we are going to provide from the schematic. A netlist basically consists of a set of footprint names (packages associated with schematic... Preparing for PCB Layout on proteus-7.8 Now that we have completed the circuit we need to give some thought to PCB Layout and the information that we are going to provide from the schematic. A netlist basically consists of a set of footprint names (packages associated with schematic ... Preparing for PCB Layout on proteus-7.8 Now that we have completed the circuit we need to give some thought to PCB Layout and the information that we are going to provide from the schematic. A netlist basically consists of a set of footprint names (packages associated with schematic components) and connections (wiring on the schematic), although we can things easier for ourselves later on by providing additional information. If you do not have a completed schematic at this point or wish to work with the pre-supplied schematic you can load it from the ‘..\Samples\Tutorials\’ directory of your Proteus Installation. The file name is dsPIC33_REC.dsn and by default the software is installed in ‘C:\Program Files\Labcenter Electronics\Proteus 7 Professional\’ Packaging Considerations For successful netlist transfer each component in ISIS should be associated with a footprint in ARES. Fortunately, the Proteus system provides a large set of pre-packaged components where this work is all done for us. As a case in point, the schematic we have just created requires no alteration or packaging work as the parts we have selected from the libraries already have footprints assigned to them. However, it is possible that you may want to change the footprint associated with a part (e.g. PTH to SMT). We’ll use the current schematic as a playground to explore how we can view and change packages to components. To view the package associated with a component: The footprint for a component is simply a property of the component in ISIS. We can therefore easily view the footprint by editing the component. Try this now by right clicking on one of the resistors on the schematic and selecting Edit Properties from the resulting context menu. You should see that there is a PCB Package property on the dialogue form and that the part is packaged with a standard 0805 footprint. You can also see what the default footprint is for a component at the time you select it from the libraries. At the bottom of the Pick Devices dialogue form a preview of the footprint is shown for the currently selected component. For convenience, components in ISIS often have packagings for more than one footprint. For example, if you launch the Edit Component dialogue form for the dsPIC33 component you will see that you have the option of either an SO18W or a DIL18 footprint. In this case the designer can simply change the footprint if required via the Edit Component dialogue form. To change a package on a component Launch the Edit Component dialogue form by right clicking on the resistor and selecting Edit Properties from the resulting context menu. Click on the question mark to the right of the package property to launch the footprint browser. Clear out the text from the keywords field and then use the filters on the left hand side to narrow down the selection. We will want to select the ‘Discrete Components’ category with type ‘Through Hole’ and Sub-Category ‘Resistors’. We can then select for example the ‘RES40’ footprint and click OK to commit. You should now see that the RES40 is listed as the PCB Package for the component in ISIS. Connectivity Considerations When we transfer our schematic to the PCB Layout software (netlist) all of the wires and connections are grouped into nets and passed through. ISIS actually does quite a lot of work for us behind the scenes at this point, automatically generating numerical names for the nets and also assigning the net to a default ‘net class’. Net names are assigned by ISIS according to the following rules: A group of connections which include a named terminal will be assigned a net name according to the name of the terminal. A group of connections which include an unnamed ground terminal will be assigned to the GND net. A group of connections which include an unnamed power terminal will be assigned to the VCC net. Any other group of connections is given an auto-generated numerical name. What this means in practice is that all the work is done for us here; there is no real need for us to get involved in naming groups of connections. It is important however, that we understand the rules for unnamed ground and power terminals. If in any doubt, you should always name your terminals explicitly. If a net does not have a name from a terminal you can if you wish explicitly name a net by placing a wire label with syntax (NET=NAME). This is useful if you wish to place a power plane on the net in ARES and otherwise helps to distinguish the net from other nets with auto-generated names. A ‘net class’ is simply a group of nets which will have common properties in the PCB Layout. Specifically, all connections in a net class will have the same trace width and will obey a single set of rules with regard to clearances and design rules. Again, ISIS will do a considerable amount of work for us and will assign net classes as follows: Any net with a power or ground terminal is assigned to the POWER net class. Any net with a bus is assigned to the BUS net class. Any other net is assigned to the SIGNAL net class. This gives us quite a bit of flexibility during PCB layout as we can define different trace widths, via styles, clearances and so on for each net class. Sometimes, however, we will need a particular set of conditions for particular connections. ISIS allows us therefore to create our own net classes and these will then be passed through to the PCB Layout software, allowing us to define routing and clearance properties specifically for those connections. Let’s take an example. On the tutorial schematic consider the output of the DC/DC converter on the Analog sheet of our design. This is the 5V switched power supply for the analog circuitry so we really want to lay this out with a track width smaller that on the POWER net class but larger than on the SIGNAL net class. The procedure for specifying a new net class is very straightforward. To specify a new net class Select the Wire Label Icon. Left click the mouse on a wire we wish to assign the net class to. Any wire on the net will do – in our case let’s place it between the output of the MAX1724 and the SW_PW terminal. You will see a small ‘x’ under the cursor when the mouse is over the wire. Left click the mouse over the wire to launch the wire label dialogue form. Then simply type in ‘CLASS=ANSW’ to assign the net class. If you have completed drawing the schematic follow this procedure now to add the net class; this will already be in place if you have loaded our pre-supplied schematic. We’ll see in the ARES documentation how to configure routing styles and design rules for the net class. #collected from the proteus>>help>> tutorial page Preparing for PCB Layout on proteus-7.8 Now that we have completed the circuit we need to give some thought to PCB Layout and the information that we are going to provide from the schematic. A netlist basically consists of a set of footprint names (packages associated with schematic components) and connections (wiring on the schematic), although we can things easier for ourselves later on by providing additional information. If you do not have a completed schematic at this point or wish to work with the pre-supplied schematic you can load it from the ‘..\Samples\Tutorials\’ directory of your Proteus Installation. The file name is dsPIC33_REC.dsn and by default the software is installed in ‘C:\Program Files\Labcenter Electronics\Proteus 7 Professional\’ Packaging Considerations For successful netlist transfer each component in ISIS should be associated with a footprint in ARES. Fortunately, the Proteus system provides a large set of pre-packaged components where this work is all done for us. As a case in point, the schematic we have just created requires no alteration or packaging work as the parts we have selected from the libraries already have footprints assigned to them. However, it is possible that you may want to change the footprint associated with a part (e.g. PTH to SMT). We’ll use the current schematic as a playground to explore how we can view and change packages to components. To view the package associated with a component: The footprint for a component is simply a property of the component in ISIS. We can therefore easily view the footprint by editing the component. Try this now by right clicking on one of the resistors on the schematic and selecting Edit Properties from the resulting context menu. You should see that there is a PCB Package property on the dialogue form and that the part is packaged with a standard 0805 footprint. You can also see what the default footprint is for a component at the time you select it from the libraries. At the bottom of the Pick Devices dialogue form a preview of the footprint is shown for the currently selected component. For convenience, components in ISIS often have packagings for more than one footprint. For example, if you launch the Edit Component dialogue form for the dsPIC33 component you will see that you have the option of either an SO18W or a DIL18 footprint. In this case the designer can simply change the footprint if required via the Edit Component dialogue form. To change a package on a component Launch the Edit Component dialogue form by right clicking on the resistor and selecting Edit Properties from the resulting context menu. Click on the question mark to the right of the package property to launch the footprint browser. Clear out the text from the keywords field and then use the filters on the left hand side to narrow down the selection. We will want to select the ‘Discrete Components’ category with type ‘Through Hole’ and Sub-Category ‘Resistors’. We can then select for example the ‘RES40’ footprint and click OK to commit. You should now see that the RES40 is listed as the PCB Package for the component in ISIS. Connectivity Considerations When we transfer our schematic to the PCB Layout software (netlist) all of the wires and connections are grouped into nets and passed through. ISIS actually does quite a lot of work for us behind the scenes at this point, automatically generating numerical names for the nets and also assigning the net to a default ‘net class’. Net names are assigned by ISIS according to the following rules: A group of connections which include a named terminal will be assigned a net name according to the name of the terminal. A group of connections which include an unnamed ground terminal will be assigned to the GND net. A group of connections which include an unnamed power terminal will be assigned to the VCC net. Any other group of connections is given an auto-generated numerical name. What this means in practice is that all the work is done for us here; there is no real need for us to get involved in naming groups of connections. It is important however, that we understand the rules for unnamed ground and power terminals. If in any doubt, you should always name your terminals explicitly. If a net does not have a name from a terminal you can if you wish explicitly name a net by placing a wire label with syntax (NET=NAME). This is useful if you wish to place a power plane on the net in ARES and otherwise helps to distinguish the net from other nets with auto-generated names. A ‘net class’ is simply a group of nets which will have common properties in the PCB Layout. Specifically, all connections in a net class will have the same trace width and will obey a single set of rules with regard to clearances and design rules. Again, ISIS will do a considerable amount of work for us and will assign net classes as follows: Any net with a power or ground terminal is assigned to the POWER net class. Any net with a bus is assigned to the BUS net class. Any other net is assigned to the SIGNAL net class. This gives us quite a bit of flexibility during PCB layout as we can define different trace widths, via styles, clearances and so on for each net class. Sometimes, however, we will need a particular set of conditions for particular connections. ISIS allows us therefore to create our own net classes and these will then be passed through to the PCB Layout software, allowing us to define routing and clearance properties specifically for those connections. Let’s take an example. On the tutorial schematic consider the output of the DC/DC converter on the Analog sheet of our design. This is the 5V switched power supply for the analog circuitry so we really want to lay this out with a track width smaller that on the POWER net class but larger than on the SIGNAL net class. The procedure for specifying a new net class is very straightforward. To specify a new net class Select the Wire Label Icon. Left click the mouse on a wire we wish to assign the net class to. Any wire on the net will do – in our case let’s place it between the output of the MAX1724 and the SW_PW terminal. You will see a small ‘x’ under the cursor when the mouse is over the wire. Left click the mouse over the wire to launch the wire label dialogue form. Then simply type in ‘CLASS=ANSW’ to assign the net class. If you have completed drawing the schematic follow this procedure now to add the net class; this will already be in place if you have loaded our pre-supplied schematic. We’ll see in the ARES documentation how to configure routing styles and design rules for the net class. #collected from the proteus>>help>> tutorial page beginner, English, PCB Layout, proteus-7.8, tutorial Uncategorized #Beginner, #English, #PCBLayout, #Proteus78, #Tutorial #Uncategorized An engineering blog in Bangladesh
Posted on: Wed, 19 Nov 2014 08:07:06 +0000
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